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Verilog Computer-Based Training Course, by Zainalabedin Navabi, Zainalabedin Navabi
Free Ebook Verilog Computer-Based Training Course, by Zainalabedin Navabi, Zainalabedin Navabi
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McGraw-Hill Publishing with the cooperation of major EDA vendors has developed the first computer-based training course for the popular Verilog Hardware Description Language. This is a complete training and software package that includes everything that is needed for design with Verilog, from trainings to software and from simulation programs to synthesis tools. The core of this package is the Verilog Computer-Based Training program that is authored and compiled by Dr. Zainalabedin Navabi, an authority in HDLs and EDA tools and environments. In addition to this training program, the course package contains hundred�s of worked examples and templates, language and software tutorials, and simulation and synthesis tools. The Verilog CBT is an interactive training program designed for all skill levels. The material is geared to students in computer and electrical engineering programs or to professional engineers. . .
Never before, so much tools and training programs have been offered for a fraction of what is usually paid for a 1-day course.. .
Verilog Computer-Based Training Course:. .
With the Verilog CBT you can learn Verilog at your own pace with this comprehensive, up-to-date, and powerful CD-ROM training course and save over 90% of the cost of online courses or single-day seminars. Start at the beginning with the development of Verilog code and the application of HDL-based tools in simulation, synthesis, and testing of digital systems--or jump in anywhere if you already know some of the material. This resource-loaded CD will be an indispensable reference for as long as you use Verilog--and for anyone currently working in this rapidly growing HDL. The CD includes synthesizable templates for common RT-level components and has complete Verilog code for interface devices and arithmetic units such as array multipliers, pipeline dividers and polynomials. The topic of test benches and test bench generation is completely covered in this CD. . .
Verilog Computer-Based Training Course CD-ROM features:.
�Everything you need to learn Verilog, in an interactive environment .
�Hundreds of worked examples and self-test problems from easy to complex .
�Test bench for every example, test bench templates for complex circuits .
�License for Mentor�s industry leading Verilog simulation and synthesis tools.
�Altera�s complete PLD design tool including simulation and synthesis.
�Mentor Graphic�s ModelSim Verilog simulators that run all examples.
�Mentor Graphic�s LeonardoSpectrum synthesis tool.
�Software tutorials, as well as tutorials for simulation and synthesis .
�Quick access to the exact model, template, data, syntax, or grammar you need .
�Hard-copy user's manual with detailed study guide .
�Supporting web site with answers to all problems and simulations.
�Projects at the end of each subject and quizzes at the end of topics. .
With your purchase you will get tools and programs:. .
This is more than just a training program. It contains all that a design engineer or a college student needs for learning Verilog and designing with this fastest growing HDL. .
Here is what is on the training CD:.
�Verilog Computer-Based Training software.
�Synthesis manuals and guidelines.
�Tutorials for use of simulation and synthesis tools that are included on the CD.
�Verilog programs and code templates for common designs and testbenches.
�Extendable one-year license for Mentor�s ModelSim simulator.
�Extendable one-year license for Mentor�s LeonardoSpectrum synthesis tool.
�License for Altera�s Quartus II design and PLD programming environment.
�Student version of Aldec�s Active HDL design and simulation environment.
�Schematic capture and block diagram editors and simulators. .
Users of Verilog Computer-Based Training Course:. .
The course is designed for students and professional engineers at all levels. It is designed for each user's pace and skill level, from novice to advanced. The hard-copy user�s manual shows how users with different skill levels can benefit from this course.. .
Who can use this training CD:.
�Those who are new to large scale design and need HDL and design trainings and tools.
�Design engineers requiring advanced synthesis and programming skills and Verilog design tools .
�Modeling engineers requiring advanced Verilog programming techniques.
�Software developers that need all the details of Verilog from timing specification to high-level modeling.
�Students in Logic Design who need schematic capture tools and training in Verilog design and programming environments.
�Students in Computer Architecture who need training in synthesizable Verilog and use of high-level simulation and synthesis tools.
�Students in VLSI and Electronics who require the use of switch level modeling tools and timing simulation tools. .
Organization of Verilog Computer-Based Training:. .
The material is organized into different levels, called streams. Each stream targets a particular facet of working with the Verilog language, thereby allowing the user to "jump into" what they are immediately interested in. Streams are divided into flows in which Verilog circuits and coding styles are discussed. . .
Contents of the Verilog CBT training:.
�Verilog in a Top-Down Design Environment, covering steps that are taken in a top-down design of a small processor.
�Verilog from Switches to Systems: in a simple to complex fashion, it shows Verilog coding of circuits from switches to systems. It covers complex combinational circuits, sequential blocks, state machines and test benches.
�Verilog Language Reference Manual, covers the standard Verilog language and shows point examples .
�Verilog Synthesizable Circuit Templates: starts with simple synthesizable codes and describes coding styles for complex combinational and sequential circuit synthesis.
�Verilog Formal Syntax Definition: a hyper-linked document shows the formal definition of the IEEE standard Verilog language .
�Verilog Based Simulation and Synthesis: step-by-step getting-started tutorials discuss installation and use of all software programs that are included on the CD. .
Verilog Computer-Based Training Software:. .
The Verilog CBT software takes advantage of modern multi-media teaching techniques. It uses animations and sound for an effective teaching of a difficult subject. The material is organized and presented with hyperlinked information selection, animation sequences, and different ways of presenting the same information.. .
Features of the Verilog CBT software:.
�Uses animations to illustrate design, simulation and synthesis topics.
�Easy to use menus and ample help in each screen.
�Search tool for examples and language topics.
�Easy access to circuit diagrams, Verilog code, testbench and simulation runs.
�Verilog codes of schematic symbols appear as code-tips when selected .
�Bookmark tool marks a page or circuit to go back to.
�Easy access to the electronic manual.
�Step-by-step menu-driven directions form use of simulation and synthesis tools.
�Hyperlinked language reference manual and Verilog syntax summary. .
Circuits:.
Array multiplier; Associative memory; Asynchronous control; Bus arbiter; Carry look-ahead adders; Combinational UDPs; Controllers and state machines; Controller testing; Data path testing; Exhaustive testing; External file handling; FIFO queues; Fault tolerant adders; IEEE 1149.1; Iterative circuits; LFSR; LRU; MISR; Memory parts; Pipeline divider; Polynomial calculation; Registers and register files; Sequential UDPs; Shifters and counters; Stacks; System architectures; Switch level logic; Test benches; UART; Wired logic. .
Constructs:.
Always statement; Assign statements; Assign and deassign; Blocking assignment; Case statement; Delay control; Display; Event control; Force and release; Fork and join; Function definition; Hierarchical names; If statement; Intra assignment delay; Memory; Net types; Non-blocking assignment; Parameters; Path delay; PLA modeling; Procedural blocks; Setup and hold check; Specify block; Strength modeling; System tasks; Task declaration; Timing check; Timing control; Trireg; Wait statement. . . . . . . . . . . .
- Sales Rank: #9042400 in Books
- Published on: 2002-04-30
- Original language: English
- Subtitled in: English
- Number of items: 1
- Dimensions: 9.70" h x 1.30" w x 8.10" l,
- Binding: CD-ROM
From the Back Cover
teach yourself the fastest-growing HDL -- hands down and hands on.
. Learn Verilog with an Interactive Tutor.
. Save over 90% of the cost of online courses or single-day seminars!.
. COMPLETE SELF-TEACHING COURSE AND VERILOG REFERENCE.
. You can learn Verilog at your own pace with this comprehensive, up-to-date, and powerful CD-ROM training course. Start at the beginning with the development of Verilog code and the application of HDL-based tools in simulation, synthesis, verification, and testing or digital systems�or jump in anywhere if you already know some of the material. There�s more. This resource-loaded CD will be an indispensable reference for as long as you use Verilog�and for anyone currently working in this rapidly growing HDL. The CD includes templates for common RT-level components and has complete Verilog code for parallel and serial interface devices and arithmetic units such as array multipliers, pipeline dividers and polynomials. The topic of test benches and test bench generation in Verilog is completely covered in this CD..
. Verilog Computer-Based Training Course CD-ROM features:.
*everything you need to learn Verilog, in an interactive environment.
*hundreds of worked examples and self-test problems from easy to complex.
*test bench for every example and test bench templates for complex circuits.
*quality Verilog simulator that runs all examples.
*live links to working Verilog models and references.
*quick access to the exact model, template, data, syntax, or grammar you need.
*60-page user�s manual with answers to all problems and simulations.
*projects at the end of each subject.
*quizzes at the end of topics.
. the first CBT self-tutor in Verilog.
.
*Always statement.
*Assign statements.
*Assign and deassign.
*Blocking assignment.
*Case statement.
*Delay control.
*Display.
*Edge detection.
*Event control.
*Force and release.
*Fork and join.
*Formal grammar.
*Function definition.
*Hierarchical names.
*If statement.
*Intra assignment delay.
*Language constructs.
*Memory.
*Net types.
*Nonblocking assignment.
*Parameters.
*Path delay.
*PLA modeling.
*Procedural blocks.
*Registers.
*Setup and hold check.
*Specify block.
*Strength modeling.
*Syntax.
*Synthesizable code.
*System tasks.
*Task declaration.
*Test benches.
*Timing check.
*Timing control.
*Trireg.
*Wait statment.
. CIRCUIT DESCRIPTIONS.
.
*Array multiplier.
*Associative memory.
*Asynchronous control.
*Bus arbiter.
*Busses.
*Carry look-ahead adders.
*Circuit templates.
*Combinational circuits.
*Combinational UDPs.
*Controllers and state machines.
*Controllers testing.
*Data path testing.
*Exhaustive testing.
*External file handling.
*FIFO quieues .
*Fault tolerant adders.
*Flip-flops .
*Gate-level blocks.
*IEEE 1149.1.
*Iterative circuits.
*LFSR.
*LRU.
*Logic gates.
*MISR.
*Memory parts.
*Pipeline divider.
*Registers.
*Register files.
*Sequential UDPs.
*Shifter-counters.
*Stacks.
*System architectures.
*Switch level logic.
*TAP controller.
*Test benches.
*UART.
*Wired logic
About the Author
Zainalabedin Navabi, Ph.D., is professor of electrical and computer engineering at Northeastern University and the author of Verilog Digital System Design and both editions of VHDL: Analysis and Modeling of Digital Systems, all published by McGraw-Hill. Since 1981, Dr. Navabi has worked in the design, definition, and implementation of hardware description languages and the synthesis and testing of digital systems. He has developed and supervised the development of many HDL-related software packages and tools, and has directed projects in VLSI design, test synthesis, simulation, synthesis, and other aspects of digital system design automation. He has served as a consultant for several EDA companies developing HDL-based tools and environments. Dr. Navabi is a member of ACM, IEEE, and IEEE Computer Society, and is an active participant in the IEEE DASC committee that sets standards related to hardware description languages.
Most helpful customer reviews
8 of 8 people found the following review helpful.
Very dissapointing
By Pete Rodriguez
Since I work for Intel and support the HW and ASIC engineers who design CPLD, FPGAs, ASICs, etc. I decided to purchase this tutorial to get an understanding of the concepts needed for this specific field. I had high hopes for this course especially after reading some of the reviewer's comments. I must say I am deeply dissappointed I paid so much money for a tutorial that is filled with numerous errors. There are so many errors in Streams 2 and 3 that I worry about the other Streams. Streams 2 and 3 are supposed to supply you with the basics, however they are so flawed that many examples contradict themselves. As I stated I am new to this so as I was reading I came across many examples that build on the previous ones that just didn't make sense in terms of how the verilog code was written. I am lucky I work with top-notch ASIC engineers who have been very helpful in answering my questions. Without them I would be so lost in the course contents. These professionals have made known to me their disappointment in a Verilog tutorial that is so prone to inconsistencies and errors. If the basic building blocks to this course are abundant with errors then what does it mean about the rest of the course? As to the other reviewers who gave it 4 or more stars I have just one question for them ---what are you smoking? (because there is no way we can be talking about the same course). If they actually say they learned Verilog based on this course then I would be very wary of their basic understanding of the foundational concepts. In closing the author has not done a good job in reviewing the material content. He stated in his introductory comments his thanks to his team in reviewing the entire course. I pose to all of you that his team failed him miserably. I expect better from individuals who consider themselves experts in this field.
3 of 3 people found the following review helpful.
Good presentation of tough subject
By William C. Adler
Review:
Initial Impression: Good presentation of CDROM and user guide.
Detailed Review:
Manual: The manual explained how the whole training was organized in a clear manner. So, the manual is just a meta-guide to help you understand why the material is presented the way it is on CD.
CDROM:
- Install: Flawless (except for minor annoyance, listed below).
- Material Organization: The material is organized into different levels, called streams. Each stream targets a particular facet of working with the Verilog language, thereby allowing the user to "jump into" what they are immediately interested in.
- Material Presentation: Heavy use of animation. Some of it good, some of it benign. Since there was actually substance behind the animation sequences, I didn't get too annoyed.
- Minor Annoyance: One of the Macromedia Flash links failed to work. I went to the website listed in the manual, and some of the pages seemed broken. This gave me a real bad feeling. Re-reading the manual, I discovered that you must set you default web browser to be Internet Explorer. Doing this fixed the broken Macromedia links.
Final Opinion: I think that Zainalabedin has tackled the tough subject of Verilog design and the equally tough medium of electronic publishing and done an admirable job. The material was well organized and presented with hyperlinked information selection, animation sequences, and different ways of presenting the same information.
Grade: B+
6 of 7 people found the following review helpful.
Great learning tool.
By Vincent Lai
I have learned a lot about Verilog from the time I first received this training material. What made this package successful for me are both the presentation material and the software tools available for hands on practice. First of all, the package comes with simulation and synthesis tools from well-known software manufacturers. You get to install your own choices of simulation tools, and if you are not sure which software to install, there are suggestions from the manual. However, some software do have a one year expiration date and they require a network card. Also, make sure your network card is plugged into the network hub, otherwise, the software could not detect the NIC ID. Other than that, the software installation went smoothly for me and was able to get up to speed in utilizing the software tools with some cursory material which is presented as part of the lesson plan.
The presentation material is didactic and the instructions are easy to follow. There are a plethora of circuits examples, and each circuit example is always accompanied by a logic diagram or block, the Verilog code that describe the logic diagram and the testbench that simulates the end result of the logic diagram described. At the end of every sequence, there will be a project given and it is totally optional to the user whether or not to take up the exercises. The answers to the projects are given and are posted under the author's website. Also, at the end of every stream, there are some short quizzes for further reinforcement to the subject discussed.
Overall, I find this package to be really useful and effective in learning the Verilog design and its unequivocal that Dr. Navabi and his team has done a great job in putting this package together for those of us who are interested in learning the Verilog design language.
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